SIM 2010 – Program Schedule
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KL-Cuts: Logic Synthesis Targeting Multiple Output Blocks
Osvaldo Martinello Jr, Felipe S Marques, Renato P Ribas and André I Reis
A Tool for the Automatic Generation of the Ordering and Partitioning of Coefficients
in FIR Filters
Angelo Luz, Eduardo da Costa and Marilton Aguiar
AIG Rewriting Considering Multiple Objectives
Thiago Figueiro, Renato Ribas and Andre Reis
Automatic Cell Layouts Generation Using the ASTRAN Tool
Gracieli Posser, Daniel Guimarães Jr , Adriel Ziesemer, Gustavo Wilke and Ricardo Reis
A Graph-based Approach to Generate Optimized Transistor Networks
Vinicius Possani, Eric Timm, Luciano V Agostini and Leomar da Rosa Junior
Clock Mesh Size for Wirelength and Capacitance Minimization
Guilherme Flach, Gustavo Wilke, Marcelo Johann and Ricardo Reis
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Power Efficient Motion Estimation Architecture Using QSDS Algorithm with Dynamic
Iteration Control
Marcelo Porto, João Altermann, Eduardo Costa, Luciano Agostini and Sergio Bampi
A Low-Cost Hardware Architecture Design for Binarizer Defined by H 264/AVC Standard
André Martins, Vagner Rosa, Dieison Deprá and Sergio Bampi
Adaptive Distortion Metric Architecture for H 264/AVC Video Coding
Guilherme Corrêa, Cláudio Diniz, Luciano Agostini and Sergio Bampi
A New Parallel Motion Estimation Algorithm
Diego Noble, Gabriel Siedler, Marcelo Porto and Luciano Agostini
A Dedicated Hardware Solution for the H 264/AVC Half-Pixel Interpolation Unit
Marcel Corrêa, Mateus Schoenknecht and Luciano Agostini
A Low Cost Real Time Motion Estimation/Compensation Architecture for the H 264/AVC
Video Coding Standard
Robson Dornelles, Luciano Agostini and Sergio Bampi
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Improvements in the Detection of False Path by Using Unateness and Satisfiability
Felipe Marques, Osvaldo Martinello Jr, Renato Ribas and André Reis
A Case Study about Variability Impact in a Set of Basic Blocks Designed to Regular Layouts
Jerson Paulo Guex, Cristina Meinhardt and Ricardo Reis
SwitchCraft - A Tool for Generating Switch Networks for Digital Cells
Vinicius Callegaro, Felipe de Souza Marques, Carlos Eduardo Klock,
Leomar S da Rosa Jr, Renato P Ribas and André I Reis
GDLR: a Detailed Routing Tool
Charles Leonhardt, Adriel Ziesemer and Ricardo Reis
A Software Tool for the Analysis of Reliability in Combinational Logic Circuits
Mateus Teixeira Borges, Rafael Florentino de Oliveira and Denis Franco
Evaluating Power Consumption on Buses Under the Effect of Crosstalk
Carolina Metzler, Gustavo Wilke, Ricardo Reis and Luigi Ferreira
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Low Latency and High Throughput Architecture for the H 264/AVC Transforms and
Quantization Loop Targeting Intra Prediction
Daniel Palomino, Felipe Sampaio and Luciano Agostini
Efficiency Evaluation and Architecture Design of SSD Unities for the H 264/AVC Standard
Felipe Sampaio, Gustavo Freitas Sanchez, Robson Dornelles and Luciano Agostini
Evaluating the Ginga Media Processing Component for Implementation of a Video Player
Marco Beckmann, Tiago H Trojahn, Juliano L Gonçalves, Lisane Brisolara and
Luciano V Agostini 1
A Implementation of Media Processing Component Using LibVLC Library for the
Ginga Middleware
Tiago H Trojahn, Juliano L Gonçalves, Leomar S da Rosa Junior and Luciano V Agostini
A Media Processing Implementation Using Xine-Lib for the Ginga Middleware
Rafael Pereira, Juliano L Gonçalves, Julio C B Mattos and Luciano V Agostini
Proposal of a Diamond Search Design with Integrated Motion Compensation for a
Half/Quarter-Pixel H 264/AVC Motion Estimation Architecture
Gustavo Freitas Sanchez, Robson Sejanes Soares Dornelles and Luciano Volcan Agostini
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Wire Length Evaluation of Dedicated Test Access Mechanisms in
Networks-on-Chip based SoCs
Alexandre Amory, Cristiano Lazzari, Marcelo Lubaszewski and Fernando Moraes
Model-Based Power Estimation of NOC-Based MPSoCs
Luciano Ost, Guilherme Guindani, Leandro Indrusiak and Fernando Moraes
Implementation and Evaluation of a Congestion Aware Routing Algorithm for
Networks-On-Chip
Leonel Tedesco, Thiago Gouvea da Rosa and Fernando Moraes
Flow Oriented Routing for NOCs
Everton Carara and Fernando Moraes 3
Adaptive Buffer Size Based on Flow Control Observability for NoC Routers
Anelise Kologeski, Caroline Concatto, Débora Matos, Fernanda Kastensmidt,
Luigi Carro, Altamiro Susin and Márcio Kreutz
Crosstalk Fault Tolerant NOC - Design and Evaluation
Alzemiro Lucas, Alexandre Amory and Fernando Moraes
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Radix-2 Decimation in Time (DIT) FFT Implementation Based on Multiple Constant
Multiplication Approach
Sidinei Ghissoni, Eduardo Costa, José Monteiro, Cristiano Lazzari and Ricardo Reis
Synthesis-Based Dedicated Radix-2 DIT Butterflies Structures for a Low Power FFT Implementation
Mateus Beck Fonseca, Eduardo da Costa and João B dos S Martins
Implementation of Adders Circuits Using Residue Number System – RNS
Alexsandro O Schiavon, Eduardo A C Costa and Sérgio J M Almeida
Optimal Arrangement of Parallel Prefix Adder(PPA) Trees Acording to Area and
Performace Criteria
Kim Escobar, Luca Manique and Renato Perez Ribas
Implementation of a Floating Point Unit in the Technology X-FAB 0 35
Raphael Da Costa Neves and Iuri Castro
Floating Point Unit Implementation for a Reconfigurable Architecture
Bruno Hecktheuer, Mateus Grellert, Julio C B Mattos, Antonio C S Beck,
Mateus Rutzig and Luigi Carro
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1V Self-Biased Current Sources with 10nW of Maximum Power Consumption
Roddy Romero and Henrique Mamoru
Automatic Sizing of Analog Integrated Circuits Including Analysis of Parameter Variation
Lucas Compassi Severo and Alessandro Girardi
Photoluminescence Behavior of Si Nanocrystals Produced by Hot Implantation into
Silicon Nitride
Fellipe C Pereira, Pietro S Konzgen, Felipe L Bregolin and Uilson S Sias
Study of the Electroluminescence from Ge Nanocrystals Obtained by Hot Ion
Implantation into SiO2
Pietro S Konzgen, Fellipe C Pereira, Felipe L Bregolin and Uilson S Sias
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Designing NBTI Robust Gates
Paulo F Butzen, Vinicius Dal Bem, André I Reis and Renato P Ribas
A Study About Transient Vulnerabilities in Combinational Circuits
Mayler Martins, Fernanda Lima, Renato Ribas and André Reis
Design and Verification of a Layer-2 Ethernet MAC Search Engine and Frame Marker
for a Gigabit Ethernet Switch
Jorge Tonfat, Gustavo Neuberger and Ricardo Reis
Evaluating the Efficiency of Software-only Techniques in Microprocessors
José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, João Almeida and Fernanda Lima
Exploring Embedded Software Efficiency through Code Refactoring
Wellisson G P, Da Silva, Lisane Brisolara, Ulisses B Corrêa and Luigi Carro
A Front-End Development Environment for the Brazilian Digital Television System
Jônatas Romani Rech, Leonardo Roveda Faganello and Altamiro Amadeu Susin
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